Exploiting high-level synthesis tools for high …

This was a critical step: for high-level synthesis to gain acceptance and usage in industry, it has to be presented as a solution to a designer ™s problem.

Exploiting high-level synthesis tools for high-performance applications on FPGAs.

1 Introduction High-level synthesis is the process of transforming abstract representations of circuit behavior into implementations through a process of successive reduction in abstraction level.

Is high-level synthesis ready for prime time? | EDN

“Exploiting High-level Synthesis Tools for High-performance Applications on FPGAs.” .

While high-level synthesis (HLS) tools reduce the implementation effort, the huge design space exploration (DSE) demands a methodology to exploit the FPGA for a particular application in a reasonable time.